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CS2842A/3843A SERIES
CS2842A/CS3842A CS2843A/CS3843A
Off-Line Current Mode PWM Control Circuit with Undervoltage Lockout
Description
The CS284XA, CS384XA provides all the necessary features to implement off-line fixed frequency current-mode control with a minimum number of external components. The CS384XA family incorporates a new precision temperature-controlled oscillator with an internally trimmed discharge current to minimize variations in frequency. A precision dutycycle clamp eliminates the need for an external oscillator when a 50% dutycycle is used. Duty-cycles greater than 50% are also possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion implant resistors provide tighter control of undervoltage lockout. Other features include low start-up current, pulse-by-pulse current limiting, and a high-current totem pole output for driving capacitive loads, such as the gate of power MOSFET. The output is LOW in the off state, consistent with N-channel devices. The CS384XA series of current-mode control ICs are available in 8 and14 lead packages for surface mount (SO) applications as well as 8 lead PDIP packages.
Features
s Optimized for Off-line Control s Internally Trimmed Temperature Compensated Oscillator s Maximum Duty-cycle Clamp s VREF stabilized before Output Stage is Enabled s Low Start-up Current s Pulse-by-pulse Current Limiting s Improved Undervoltage Lockout s Double Pulse Suppression s 1% Trimmed Bandgap Reference s High Current Totem Pole Output
Absolute Maximum Ratings
Supply Voltage (ICC<30mA).........................................................................Self Limiting Supply Voltage (Low Impedance Source) .................................................................30V Output Current..............................................................................................................1A Output Energy (Capacitive Load) ................................................................................5J Analog Inputs (VFB, Sense) ...........................................................................-0.3V to 5.5V Error Amp Output Sink Current .............................................................................10mA
Lead Temperature Soldering Wave Solder (through hole styles only) ..........10 sec. max, 260C peak Reflow (SMD styles only) ...........60 sec. max above 183C, 230C peak Block Diagram
V CC 34V Gnd 16V/10V (8.4V/7.6V) 2.50V OSC Output Enable NOR V OUT + V FB - Error Amplifier VC R 1V 2R S R Current Sensing Comparator PWM Latch Undervoltage Lock-out Circuit Set/ 5V Reset Reference Internal Bias V REF V CC Pwr
Package Options
8 Lead PDIP & SO Narrow
COMP VFB Sense OSC
1 2 3 4 8 7 6 5
VREF VCC VOUT Gnd
14 Lead SO Narrow
COMP 1 NC 2 VFB 3 NC
Pwr Gnd
4 5 14 13 12 11 10 9 8
VREF NC VCC VCC Pwr VOUT Pwr Gnd Gnd
Oscillator
Sense
COMP Sense
NC 6 OSC 7
( ) Indicates CS-2843A/3843A
Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com
Rev. 10/23/98
1
A
(R)
Company
CS2842A/3843A SERIES
Electrical Characteristics: -25 TA 85C for CS2842A/2843A, 0 TA 70C for CS3842A/3843A. VCC = 15V (Note 1); RT = 680, CT = .022F for triangular mode, RT = 10k, CT = 3.3nF for sawtooth mode (see Figure 3), unless otherwise stated.
PARAMETER TEST CONDITIONS CS2842A/CS2843A MIN TYP MAX CS3842A/CS3843A MIN TYP MAX UNITS
s Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit s Oscillator Section Initial Accuracy Voltage Stability Temp. Stability Sawtooth Mode (see Fig. 3), TJ = 25C 47 Triangular Mode (see Fig. 3), TJ = 25C 47 12 VCC 25V Sawtooth Mode TMIN TA TMAX (Note 2) Triangular Mode TMIN TA TMAX (Note 2) OSC peak to peak TJ = 25C TMIN TA TMAX 7.5 7.2 52 52 0.2 5 8 1.7 8.3 9.3 9.5 7.5 7.2 57 57 1.0 47 44 52 52 0.2 5 8 1.7 8.3 9.3 9.5 57 60 1.0 kHz kHz % % % V mA mA TJ = 25C, IOUT = 1mA 12 VIN 25V 1 IOUT 20mA (Note 2) Line, Load, Temp. (Note 2) 10Hz f 10kHz, TJ = 25C (Note 2) TA = 125C, 1kHrs. (Note 2) TA = 25C -30 4.90 50 5 -100 25 -180 -30 4.95 5.00 6 6 0.2 5.05 20 25 0.4 5.10 4.82 50 5 -100 25 4.90 5.00 6 6 0.2 5.10 V 20 25 0.4 mV mV mV/C V mV -180 mA
5.18 V
Amplitude Discharge Current
s Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low s Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output s Output Section Output Low Level Output High Level ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA 2 13.0 12.0 0.1 1.5 13.5 13.5 0.4 2.2 13.0 12.0 0.1 1.5 13.5 13.5 0.4 2.2 V V V V (Notes 3 & 4) VCOMP = 5V (Note 3) 12 VCC 25V (Note 3) VSense = 0 TJ = 25C (Note 2) 2.85 0.9 3.00 1.0 70 -2 150 -10 300 3.15 1.1 2.85 0.9 3.00 1.0 70 -2 150 -10 300 3.15 V/V 1.1 V dB A ns VCOMP = 2.5V VFB = 0 2 VOUT 4V (Note 2) 12 VCC 25V VFB = 2.7V, VCOMP = 1.1V VFB = 2.3V, VCOMP = 5V VFB = 2.3V, RL = 15k to ground VFB = 2.7V, RL = 15k to VREF 65 0.7 60 2 -0.5 5 2.45 2.50 -0.3 90 1.0 70 6 -0.8 6 0.7 1.1 2.55 -1.0 65 0.7 60 2 -0.5 5 2.42 2.50 -0.3 90 1.0 70 6 -0.8 6 0.7 1.1 2.58 V -2.0 A dB MHz dB mA mA V V
CS2842A/3843A SERIES
Electrical Characteristics: continued
CS2842A/CS2843A MIN TYP MAX CS3842A/CS3843A MIN TYP MAX UNITS
PARAMETER
TEST CONDITIONS
s Output Section: continued Rise Time Fall Time Output Leakage s Total Standby Current Start-Up Current Operating Supply Current VCC Zener Voltage VFB = VSense = 0V, RT = 10k, CT = 3.3nF 11 ICC = 25mA
CS2842A TYP MAX
TJ = 25C, CL = 1nF (Note 2) TJ = 25C, CL = 1nF (Note 2) UVLO Active, VOUT = 0
50 50 -0.01
150 150 -10.00
50 50
150 150
ns ns
-0.01 -10.00 A
0.5 17 34
1.0 11
0.5 17 34
1.0 mA
mA V
PARAMETER
TEST CONDITIONS
MIN
MIN
CS3842A TYP MAX
CS2843A/CS3843A MIN TYP MAX UNITS
s Under-Voltage Lockout Section Start Threshold Min. Operating Voltage
Notes:
15 After Turn On 9
16 10
17 11
14.5 8.5
16.0 17.5 10.0 11.5
7.8 7.0
8.4 7.6
9.0 8.2
V V
1. Adjust VCC above the start threshold before setting at 15V. 2.These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with VFB=0. 4. Gain defined as: A= VCOMP VSense ; 0 VSense 0.8V.
Package Pin Description
PACKAGE PIN # PIN SYMBOL FUNCTION
8L PDIP/SO 1 2 3 4 5
14L SO Narrow 1 3 5 7 8 9 COMP VFB Sense OSC Gnd Pwr Gnd VOUT VCCPwr VCC VREF NC Error amp output, used to compensate error amplifier Error amp inverting input Noninverting input to Current Sense Comparator Oscillator timing network with Capacitor to Ground, resistor to VREF Ground Output driver Ground Output drive pin Output driver positive supply Positive power supply Output of 5V internal reference No Connection
6
10 11
7 8
12 14 2,4,6,13
3
CS2842A/3843A SERIES
Typical Performance Characteristics
Oscillator Frequency vs CT Oscillator Duty Cycle vs RT
900 800
100 90
RT =680
700 DUTY CYCLE (%) .002 .003 .005 .01 .02 .03 .04 .05 FREQ. (kHz) 600 500
80 70 60 50 40 30
RT =1.5k
400 300 200 100
RT =10k
20 10
.0005
.001
100
200
300 400 500 700
1k
2k
3k 4k 5k
7k
10k
CT (F)
RT ()
Test Circuit
V REF RT
2N2222 100k 4.7k 1k ERROR AMP ADJUST 4.7k 5k
A COMP V REF
0.1F
V CC
V FB
V CC
0.1F 1k 1W
Sense ADJUST
Sense
V OUT
V OUT
OSC
Gnd
Gnd CT
Circuit Description
Undervoltage Lockout
V CC
ON/OFF Command to reset of IC
CSX842A CSX843A V ON V OFF 16V 10V 8.4V 7.6V
During Undervoltage Lockout (Figure 1), the output driver is biased to a high impedance state. The output should be shunted to ground with a resistor to prevent output leakage current from activating the power switch.
PWM Waveform
To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (Figure 2). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed-forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. When the power supply sees a sudden large output current increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty cycle tends to exceed the maximum allowed to prevent trans4
I CC
<15mA <1mA V ON V OFF V CC
Figure 1: Typical Undervoltage Characteristics
CS2842A/3843A SERIES
Circuit Description: continued former saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of oscillator components.
VOSC OSC RESET EA Output Switch Current VCC
Setting the Oscillator
Oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source. During the discharge time, the internal clock signal blanks out the output to the Low state, thus providing a user selected maximum duty cycle clamp. Charge and discharge times are determined by the formula:
IOUT
VOUT
t c = RTCT ln
(
VREF - Vlower VREF - Vupper
) )
Figure 2: Timing Diagram for key CS2841B parameters
t d = RTCT ln
(
VREF - IdRT - Vlower VREF - IdRT - Vupper
V REF RT OSC CT Gnd
Substituting in typical values for the parameters in the above formulas: VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA tc 0.5534RTCT td = RTCT ln
(
2.3 - 0.0083 RT 4.0 - 0.0083 RT
)
Timing parameters
Vupper
The frequency and maximum duty cycle can be determined using the Typical Performance Characteristic graphs.
Grounding
Vlower tc
Sawtooth Mode
td
LARGE RT (10k) VOSC
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Gnd pin in a single point ground. The transistor and 5k potentiometer, shown in the test circuit, are used to sample the oscillator waveform and apply an adjustable ramp to Sense.
Internal Clock
Triangular Mode
SMALL RT (700k) VREF
Internal Clock
Figure 3: Oscillator Timing Network and parameters
5
CS2842A/3843A SERIES
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
D Lead Count 8 Lead PDIP 8 Lead SO Narrow 14 Lead SO Narrow Metric Max Min 10.16 9.02 5.00 4.80 8.75 8.55 English Max Min .400 .355 .197 .189 .344 .337
Thermal Data RJC RJA typ typ
8L PDIP 52 100
8L 14 L SO Narrow SO Narrow 45 30 C/W 165 125 C/W
Plastic DIP (N); 300 mil wide
Surface Mount Narrow Body (D); 150 mil wide
7.11 (.280) 6.10 (.240)
4.00 (.157) 3.80 (.150)
6.20 (.244) 5.80 (.228)
8.26 (.325) 7.62 (.300) 3.68 (.145) 2.92 (.115)
1.77 (.070) 1.14 (.045)
2.54 (.100) BSC
0.51 (.020) 0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX
.356 (.014) .203 (.008) 0.39 (.015) MIN. .558 (.022) .356 (.014) REF: JEDEC MS-001 D Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same.
1.57 (.062) 1.37 (.054) 1.27 (.050) 0.40 (.016) 0.25 (.010) 0.19 (.008) D REF: JEDEC MS-012
0.25 (0.10) 0.10 (.004)
Ordering Information
Part Number CS2842ALN8 CS2843ALN8 CS3842AGN8 CS3842AGD8 CS3842AGDR8 CS3842AGD14 CS3842AGDR14 CS2843ALD14 CS2843ALDR14 CS3843AGN8 CS3843AGD8 CS3843AGDR8 CS3843AGD14 CS3843AGDR14
0C to 70C
* * * * *
* * * * *
-25C to Description 85C * 8L PDIP * 8L PDIP 8L PDIP 8L SO Narrow 8L SO Narrow (tape & reel) 14L SO Narrow 14L SO Narrow (tape & reel) * 14L SO Narrow * 14L SO Narrow (tape & reel) 8L PDIP 8L SO Narrow 8L SO Narrow (tape & reel) 14L SO Narrow 14L SO Narrow (tape & reel) 6
Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information.
(c) 1999 Cherry Semiconductor Corporation
Rev. 10/23/98

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